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Octal D-Type Transparent Latch IC - 74HC573

Octal D-Type Transparent Latch IC - 74HC573

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  • Typical propagation delay: 18 ns 
  • Wide operating voltage range: 2 to 6 volts 
  • Low input current: 1 µA maximum 
  • Low quiescent current: 80 µA maximum 
  • Compatible with bus-oriented systems 
  • Output drive capability: 15 LS-TTL loads

Octal D-Type Transparent Latch IC - 74HC573

The 74HC Series 74HC573 IC high-speed octal D-type latches utilize advanced silicon-gate P-well CMOS technology. They possess the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads. Due to the large output drive capability and the 3-STATE feature, these devices are ideally suited for interfacing with bus lines in a bus organized system.

When the LATCH ENABLE(LE) input is HIGH, the Q outputs will follow the D inputs. When the LATCH ENABLE goes LOW, data at the D inputs will be retained at the outputs until LATCH ENABLE returns HIGH again. When a HIGH logic level is applied to the OUTPUT CONTROL OC input, all outputs go to a HIGH impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. The 74HC logic family is speed, function, and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and the ground. 


Pinout Of 74HC573 IC

Package Includes:

  • 1 x IC - 74HC573


Supply Voltage (VCC − 0.5 to + 7.0V 
Input Voltage (VIN) −1.5V to VCC + 1.5V
Output Voltage (VOUT) − 0.5 to VCC + 0.5V
Clamp Diode Current (IIK, IOK) ± 20 mA
DC Output Current, per pin (IOUT) ± 35 mA
DC VCC or GND Current, per pin (ICC) ± 70 mA 
Storage Temperature Range (TSTG) − 65°C to + 150°C 
Power Dissipation (PD) (Note 4) 600 mW
S.O. Package only 500 mW
Lead Temperature (TL) (Soldering 10 seconds)  260°C

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1.What is the difference between 74HC574 and 74HC573?

  • The 74HC574 latches will only change state on the CP input edge. When the LE signal is HIGH, the 74HC573 latches will change state. This means that the inputs must be stable as the 574 CP input rises and that nothing that happens on the input pins (D0-D7) after the CP rising edge will affect the latches.

2.What is 74HC573?

  • The 74HC574 is a three-state octal D-type flip-flop. In digital circuits, it is commonly used to store and control the state of signals in a variety of applications. The 74HC574 IC's clock input is used to synchronise the state of the flip-flops with an external signal. The input data is latched into the corresponding flip-flop on each rising edge of the clock signal.