Found a better price?
Let us know!
We'll try to match the price for you
Dual 4-bit Binary Ripple Counter IC - 74HC393

Dual 4-bit Binary Ripple Counter IC - 74HC393
Best Price Guaranteed
Best Price Guaranteed
- Regular price
- Rs. 15
- Sale price
- Rs. 15
- Regular price
-
Rs. 22 - Unit price
- /per
You save Rs. 7
32% off
GST included
Sold out
in stock
You save Rs. 7
- ⚡ Dispatched within 24 hours
- 🚚 Free shipping on orders above Rs 500/-
- 💰 Earn RC Coins on every purchase
- 🛠️ Dedicated Technical Support Team
Adding product to your cart
Dual 4-bit Binary Ripple Counter IC - 74HC393
The 74HC Series 74HC393 is a 14 Pin Dual 4-bit Binary Ripple Counter IC having 2V to 6V Operating Voltage range and 50 Mhz Clock Frequency. Each counter features a clock input (nCP), an overriding asynchronous master reset input (nMR), and 4 buffered parallel outputs (nQ0 to nQ3).
The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on nMR clears the counter stages and forces the outputs LOW, independent of the state of nCP. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Pinout:

Pinout Of 74HC393 IC
Package Includes:
- 1 x IC - 74HC393
Specifications:
Supply Voltage | − 0.5 to + 7.0V |
DC Input Voltage | − 1.5 to VCC + 1.5V |
DC Output Voltage | − 0.5 to VCC + 0.5V |
Clamp Diode Current | ± 20 mA |
DC Output Current, per pin | ± 25 mA |
DC VCC or GND Current, per pin | ± 50 mA |
Storage Temperature Range | − 65°C to + 150 °C |
Power Dissipation | 500 mW |
Lead Temperature | 260 °C |
ADDITIONAL RESOURCES
Related Blogs
1.What is 74HC393?
- The 74HC393 is a dual 4-stage binary ripple counter. Each counter has a clock input (nCP), a master reset input (nMR), and four buffered parallel outputs (nQ0 to nQ3). On the HIGH-to-LOW transition of nCP, the counter advances.
2.How does 74HC93 counter work?
- The 74HC93 is made up of four master-slave flip-flops that are internally linked to provide a divide-by-two and a divide-by-eight section. Each section has its own clock input (CP0 and CP1) to initiate counter state changes on the HIGH-to-LOW clock transition.
Use left/right arrows to navigate the slideshow or swipe left/right if using a mobile device