23-12-2024
Protective Wrap
The IC came in a protective wrap to ensure there was no damage during transit and the delivery service, which has put my mind at ease. Very happy.
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Dual 4-bit Decade Ripple Counter IC - 74HC390
Dual 4-bit Decade Ripple Counter IC - 74HC390
20
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Rs. 39
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- DC Input Diode Current: ±20mA
- Frequency: 71MHz
- Output Drive Capability: 10 LSTTL Loads
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Low Input Current: 1 μA
- High Noise Immunity Characteristic of CMOS Devices
Dual 4-bit Decade Ripple Counter IC - 74HC390
The 74HC Series 74HC390 IC is a 16 Pin Dual 4-bit Decade Ripple Counter IC having a 2V to 6V Operating Voltage range. It has been divided into four separately clocked sections. The counters have two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (nMR) and can be used in a BCD decade or bi-quinary configuration. If master reset inputs 1MR and 2MR are used to clear all 8 bits of the counter simultaneously, numerous counting configurations are possible within one package.
Section clocks nCP0 and nCP1, allow ripple counter or frequency division applications of divide-by-2, 4, 5, 10, 20, 25, 50 or 100. The HIGH-to-LOW transition of the clock inputs nCP0 and nCP1 triggers each section. For BCD decade operation, the nQ0 output is connected to the nCP1 input of the divide-by-5 section. For bi-quinary decade operation, the nQ3 output is connected to the nCP0 input and nQ0 becomes the decade output. A HIGH on the nMR input overrides the clocks and sets the four outputs LOW. Inputs include clamp diodes. It enables the use of current-limiting resistors to interface inputs to voltages in excess of VCC.
Pinout:
Pinout Of 74HC390 IC
| Symbol | Pin | Description |
| 1CP0, 2CP0 | 1, 15 | Clock input divide-by-2 section (HIGH-to-LOW; edge-triggered) |
| 1MR, 2MR | 2, 14 | Asynchronous master reset input (active HIGH) |
| 1Q0, 1Q1, 1Q2, 1Q3 | 3, 5, 6, 7 | Flip-flop outputs |
| 1CP1, 2CP1 | 4, 12 | Clock input divide-by-5 section (HIGH-to-LOW; edge-triggered) |
| GND | 8 | Ground (0 V) |
| 2Q0, 2Q1, 2Q2, 2Q3 | 13, 11, 10, 9 | Flip-flop output |
| VCC | 16 | Supply voltage |
Package Includes:
Selected qty of IC - 74HC390
Specifications:
| Operating Voltage Range | 2.0 to 6.0 V |
| Package | DIP−16 |
| Input Current | 1 uA |
| Powering Current | 160 uA |
| Output Current at VCC | 4 mA |
| Fan-Out | 10 LS-TTL Load |
| Propagation Delay | 14 ns |
| Temperature Range | -65 °C to +150 °C |
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ADDITIONAL RESOURCES
1.What is the maximum frequency of operation for 74HC390?
- The 74HC390 is a dual 4-bit decade ripple counter separated into four independently clocked portions. There are two divide-by-2 parts and two divide-by-5 sections on the counters. The maximum operating frequency of the 74HC390 is 77 MHz.
2.What is the function of the clear (CLR) pin on 74HC390?
- The clear (CLR) pin on 74HC390 is used to reset the counter to its initial state when it is pulled low. This pin is asynchronous, which means it can be engaged at any moment regardless of the clock signal.
