The 74LS90 counting sequence is triggered on the clock signal's negative going edge, that is, when the clock signal CLK changes from logic 1 (HIGH) to logic 0. (LOW). R1 and R2 are counter "reset" pins, whereas S1 and S2 are set pins.

74HC90 Decade Counter IC – 4-bit decade counter for digital logic applications. -Robocraze

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Decade Counter IC - 74HC90

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SKU: TIFIC0150

A decade counter is a binary counter that is designed to count to 1010b.
By changing the modes of Decade Counter IC, the chip can count up to other maximum numbers and return to zero.
The Decade Counter IC consists of four master-slave JK flip-flops internally connected to provide a MOD-2 (count-to-2) counter and a MOD-5 (count-to-5) counter.
Decade counter is one that counts in decimal digits, rather than binary. A decade counter may have each or other binary encodings.

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Decade Counter IC - 74HC90

~~Rs. 28~~ Rs. 23

Quantity:

Decade Counter IC - 74HC90

~~Rs. 28~~ Rs. 23

Description
Specifications
Additional Resources
FAQ
Shipping & Return

Description

Decade Counter IC - 74HC90

The 74HC Series 74HC90 Decade Counter IC having 4.75 to 5.25V Supply Voltage with 8mA Low Level and - 0.4mA High-Level Output Current. It is a simple counter, it can count from 0 to 9 cyclically in its natural mode. It counts the input pulses and the output is received as a 4-bit binary number through pins QA, QB, QC, and QD. The binary output is reset to 0000 at every tenth pulse and the count starts from 0 again.

Used For Power amplifiers, Small-signal amplifiers, Operational amplifiers, Microwave amplifiers, RF and IF amplifiers, Voltage comparators, Multiplier.

Pinout:

Pinout of 74HC90 IC

Specifications

Package Includes:

1 x IC - 74HC90

Specifications:

Type	DIP, JK Flip-Flop
Voltage Rating	4.75 to 5.25V
Current Rating	8mA Low Level and - 0.4mA High-Level Output Current
Temperature Rating	0 to 70 Deg C
Number of Bits	4 bit

Additional Resources

74HC90 Datasheet

FAQ

1.What is the working of IC 7490?

The integrated circuit 7490 is a 4-bit ripple-type decade counter. It is made up of four master/slave flip-flops that are internally linked to form a divide-by-two and a divide-by-five section. On a high-to-low clock transition, each section has a separate clock input that changes the counter's output states.

2.How to use 74LS90?

The 74LS90 counting sequence is triggered on the clock signal's negative going edge, that is, when the clock signal CLK changes from logic 1 (HIGH) to logic 0. (LOW). R1 and R2 are counter "reset" pins, whereas S1 and S2 are set pins.

Shipping & Return

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